The reading out of the signals from the photodiodes is achieved at a given frequency, which is generally the same frequency for all the photodiodes. For example for video applications, the frequency may be 50 or 60 Hertz. For fast or ultra-fast acquisition applications, the frequency is higher.
The reading out of the photodiodes is thus accomplished with “cycles”, each cycle corresponding to the integration time of the pixel, i.e. to the time during which the electric charge (formed with charges of the electrons or of the holes, depending on the nature of the photodiode) generated by the photodiode is accumulated either in the photodiode or in the readout circuit, as well as at the reading out time of the pixel.
The readout circuit of the photodiode may be achieved in different ways, in CMOS technology. It may notably be of the “direct injection” (DI), “Capacitive Trans-Impedance Amplifier” (CTIA), or “source follower per pixel” (SFP) type. These three types of readout circuits are illustrated in FIGS. 2a to 2c. 
FIG. 2a illustrates an example of an electrical diagram of a circuit for reading out pixels of the direct injection type in a hybrid configuration. An amplifier 23 associated with a transistor 22 stabilizes the bias voltage applied to the photodiode 20 via the hybridization contact 21 between the first substrate on which is made the photodiode 20 and the second substrate on which is made the readout circuit. An initialization transistor 24 is controlled by an initialization signal RST in order to apply on the output of the transistor 22 an initialization voltage VRST. An integration capacitor 25 is adapted for integrating the photo-current emitted by the photodiode 20. A buffer amplifier 26 gives the possibility of sending the voltage Signal IM to the terminals of this integration capacitor 25 towards a scanning multiplexing bus 28, via a selection switch 27.
A readout cycle comprises:                1) initializing the integration capacitor 25 by means of the initialization transistor 24,        2) integrating photoelectric charges generated by said photodiode 20 into the capacitor 25,        3) reading out the voltage Signal IM on the terminals of the capacitor 25 via the control of the switch 27.        
The result of the readout may either be directly outputted to the readout circuit so as to be utilized, or be stored in a memory present in each pixel in order to be utilized subsequently.
The resetting of the integration capacitor 25 and of the photodiode 20 however produces so a called “KTC” electronic noise, K designating the Boltzmann constant, T the temperature in Kelvins and C the capacitance of the integration capacitor 25, with reference to the quantities having an influence of this noise. After initialization, the residual charge in the integration capacitor 25 has a random variation, the quadratic average of which has the value √{square root over (KTC)}.
Thus, this KTC noise is expressed by a deviation error of the voltage on the terminals of the integration capacitor 25 with respect to the reset voltage VRST.
In order to suppress this switching noise, a strategy was developed combining two readings out of voltage at the outlet of the pixel: this is therefore a correlated double readout, also known under the acronym of CDS for “Correlated Double Sampling”.
A first readout is achieved at the beginning of a cycle, immediately after the capacitor has been reset into an initial step (reset—term which will sometimes be used by convenience and which should be considered as equivalent), by setting to a reference potential. This first readout gives a first read value of the initial amount of charges in the capacitor.
The second readout is achieved at the end of a cycle, when the capacitor is charged and reading the value of the accumulation of the integrated charges is desired.
Once both readouts are carried out and the cycle ending, comparison and computing means establish the difference between both read values. This difference gives the amount of charges generated by the photodiode which was integrated by the capacitor during the integration time.
These circuits and methods of known types thus give the possibility of determining, by computing the difference between a readout at the beginning of a cycle and a readout at the end of a cycle, for each photodiode and for each cycle, of a value of the amount of integrated charges into the capacitor from the photodiode during the integration cycle.
However, other sources of noise exist in a readout circuit of a photodiode. Now, for most of these noises, there is no correlation between the first readout and the second readout. Thus, not only these other noises are not suppressed, but further their spectral power density is increased by a factor 2.
For a CMOS (Complementary Metal Oxide Semiconductor) readout circuit, so called 1/f electronic noise is the dominating noise in all the active components such as the transistors. The power spectral density of this 1/f noise decreases with frequency. Thus, at a low frequency, the 1/f noise is significant. Now, the frequency of the operating cycles of the pixel is of the order of 50 Hz, which is expressed by a significant 1/f noise which limits the efficiency of the correlated double-sampling.
In order to reduce the 1/f noise relatively to direct injection, another type of circuit a so called CTIA, “Capacitive Trans-impedance Amplifier”, a schematic example of which is illustrated by FIG. 2b. 
The principle is similar to that of a direct injection circuit, with similar elements designated with the same numerical references. The photo-current from the photodiode 20 is integrated in the capacitor 25 through an operational amplifier 29 provided with a capacitive feedback. The initialization is accomplished by emptying the charges in the capacitor 25 by means of the initialization transistor 24 connected in parallel. The bias voltage of the photodiode 20 is maintained by means of the large gain of the operational amplifier 29.
The basic principle of this configuration is that the capacitive feedback attenuates the low frequency noise and that the efficiency of the correlated double sampling thereof is thus improved. The readout sequence is the same as that of a pixel with direct injection: a first readout is made after resetting and a second readout is made after the integration time, the image signal being formed by the difference between both of these samplings.
Inspite of the complexity of the pixel, the 1/f noise remains significant. Indeed, the best readout circuits CTIA cannot be lowered below a noise level corresponding to the charge of 40 to 50 electrons, for a very low capacitance value (5 to 10 fF). In such a configuration, the dynamics of the circuit are very low, and it easily saturates when the light exposure becomes too significant.
Another configuration is a so called SFP configuration “Source Follower per Pixel”, FIG. 2c of which shows an exemplary embodiment. This configuration aims at reducing the number of transistors in order to reduce the number of 1/f noise sources.
The operating cycle is the same as a circuit for reading out a pixel Di or CTIA, and the similar elements of these circuits are designated with the same numerical references. In a pixel readout circuit SFP, the integration of the photo-current from the photodiode 20 is directly achieved on the integration capacitor 25 of the photodiode, including a few parasitic capacitances. The strong capacitive value of the photodiode 20 reduces the amplitude of the signal read as a voltage. The noise of the readout circuit finally limits the noise level added to the photodiode 20 with a number of electrons. For example, a circuit for reading out a pixel CTIA may operate with a capacitance of 5 fF for the integration capacitor, and for a readout noise with an amplitude of 320 μV, the noise level is thus equivalent to the electric charge of 10 electrons. In an SFP pixel readout circuit, the integration capacitance may with difficulty be less than 20 fF. In this case, the readout noise 320 μV is expressed by a noise equivalent to 40 electrons.
Another drawback for the correlated double sampling in each of these circuits is that the first readout takes place at the beginning of the integration cycle, while the second readout takes place at the end of the latter. Both readouts are therefore separated by quite a long time, comparable with the cycle time. The time separating both readouts of each cycle actually corresponds to the integration time, which is equal to the cycle time (to within the reset time). Now, between both of these readouts, electronic noises other than the KTC noise may perturb the measurement, like the 1/f noise, which may then, by its variations between two readouts, lead to erroneous values of charges (inferred from the difference of both read values). This is a penalty and will be all the more since the cycle time is long corresponding to low frequencies. As an illustration, an application which has a particular penalty by this limitation is vision in a low light level, which requires long cycle times, with frequencies of the order of 50 Hz.
Another limitation of these known circuits and methods is that they require that the value read at the beginning of a cycle be stored in a memory, so as to then carry out the comparison and subtraction operation at the end of the cycle. Therefore, a memory, for example an external memory or on the contrary in each pixel readout circuit, is therefore required for storing the first sampling during the integration time.
Application US 2007/0285545 has an active pixel in which a photodiode is connected to a node for collecting charges from an active pixel, maintained at a constant voltage and forming the drain of a transistor with constant bias, so that the charges are transferred to a charge integration node. This configuration however requires a dedicated transistor and does not give the possibility of properly depleting the integration region, thereby degrading the subsequent detection of the charges.